In order to suppress variation in dead time and suppress a switching loss at the time of turning on a switching element, PTL 1 discloses a drive circuit of an inverter apparatus constituted by a delay circuit including a resistance element, a capacitor, and a diode and a shunt regulator.
In order to suppress differences in voltages to be applied to switching elements even in a case where switching timings and characteristics of the switching elements or voltages caused by an external circuit are different, PTL 2 discloses a balancing circuit configured by a series circuit of a circuit for magnetically coupling a capacitor and another circuit between a collector and a gate in each of a plurality of semiconductor switching elements connected in series for each arm.
NPL 1, NPL 2, and NPL 3 disclose that a threshold voltage is changed in a case where an SiC MOSFET is continuously electrified.